This OPA design page is still Under constant updates!

Original created August 1 2009

Last Update June 29 2011

by Martin Chu

OPA Design specification white paper in pdf format

OPA Design specification in pure text format

Parameter | Description | Unit | Typical Value | |

Operation Voltage | Volt | |||

Output Current | Ampere | |||

Phase margin (fm) | The absolute value of
the open-loop phase shift between the output and the inverting input at the frequency at which the modulus of the open-loop amplification is unity. |
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Gain margin (Am) | The reciprocal of the
open-loop voltage amplification at the lowest frequency at which the open-loop phase shift is such that the output is in phase with the inverting input. |
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Large-signal voltage amplification (Av) |
The ratio of the
peak-to-peak output voltage swing to the change in input voltage required to drive the output. |
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AVD Differential voltage amplification (Avd) |
The ratio of the change
in the output to the change in differential input voltage producing it with the common-mode input voltage held constant. |
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B1 † Unity gain bandwidth |
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BOM Maximum-outputswing bandwidth |
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Ci Input capacitance |
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CMRR Common-mode rejection ratio |
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F †Average noise figure |
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ICC+, ICCSupply current |
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IIB Input bias current |
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IIO Input offset current |
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In Equivalent input noise current |
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IOL Low-level output current |
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IOS Short-circuit output current |
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kSVS † Supply voltage sensitivity |
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kSVR Supply voltage rejection ratio |
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PD Total power dissipation |
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ri Input resistance |
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rid Differential input resistance |
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ro Output resistance |
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Slew rate (SR) | The average time rate of change of the closed-loop amplifier output voltage for a step-signal input. | |||

tr Rise time (tr) |
The time required for an output voltage step to change from 10% to 90% of its final value. | |||

Total response time (ttot) | The time between a step-function change of the input signal and the instant at which the magnitude of the output signal reaches, for the last time, a specified level range (±e) containing the final output signal level. | |||

Input voltage range (VI) | The range of voltage that if exceeded at either input may cause the operational amplifier to cease functioning properly. | |||

Input offset voltage (VIO) | The dc voltage that must
be applied between the input terminals to force the quiescent dc output voltage to zero or other level, if specified. |
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Common-mode input voltage (VIC) |
The average of the two input voltages. | |||

Common-mode input voltage range (VICR) |
The range of common-mode input voltage that if exceeded may cause the operational amplifier to cease functioning properly. | |||

Equivalent input noise voltage (Vn) |
The voltage of an ideal
voltage source (having internal impedance equal to zero) in series with the input terminals of the device that represents the part of the internally generated noise that can properly be represented by a voltage source. |
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Crosstalk Attenuation (V01/V02) | The ratio of the change in output voltage of a driven channel to the resulting change in output voltage of another channel. | |||

High-level output voltage (VOH) |
The voltage at an output with input conditions applied that according to the product specifications will establish a high level at the output. | |||

Low-level output voltage (VOL) |
The voltage at an output with input conditions applied that according to the product specifications will establish a low level at the output. | |||

Differential input voltage (VID) |
The voltage at the non-inverting input with respect to the inverting input. | |||

Maximum peak output voltage swing (VOM) | The maximum positive or
negative voltage that can be obtained without waveform clipping when quiescent dc output voltage is zero. |
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Maximum peak-topeak output voltage swing VO(PP) |
The maximum peak-to-peak
voltage that can be obtained without waveform clipping when quiescent dc output voltage is zero. |
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Common-mode input impedance (Zic) |
The parallel sum of the small-signal impedance between each input terminal and ground. | |||

Output impedance (Zo) | The small-signal impedance between the output terminal and ground. | |||

Overshoot factor | The ratio of the largest deviation of the output signal value from its final steady-state value after a step-function change of the input signal to the absolute value of the difference between the steady-state output signal values before and after the step-function change of the input signal. | |||

THD + N Total harmonic distortion plus noise (THD + N) |
The ratio of the RMS noise voltage and RMS harmonic voltage of the fundamental signal to the total RMS voltage at the output. | |||

Gain bandwidth product (GBW) |
The product of the open-loop voltage amplification and the frequency at which it is measured. | |||

Average long-term drift coefficient of input offset voltage |
The ratio of the change in input offset voltage to the change time. This is an average value for the specified time period. Usually measured in μV/month. |

Guideline:

OPA Design Guidelines

Various Designs

OPA Design

OPA Design two stage wideband

OPA cascode design procedure (I)

OPA cascode design procedure (II)

OPA High Performance using Digital CMOS process

OPA Low Power High Gain with CompensationTechnique

Design Techniques

OPA low noise optimization

Currently available products on market and their performance and design spepecification and data sheet.

OPA, low noise, high performance OPA data sheet (ADI OPA37 as an example)

OPA AC design parameter application note 723

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