IC Design fundamental and Circuit design repository                                     

                                                                                           First created Oct 16 2010
                                                                                           Last Update Nov. 11 2012
by Martin Chu

Basic Integrated Circuit Design Information:

Excellent MOS tutorial from Univ. of Taiwan

Matlab used in IC design   good for system and top level simulation and verification.

Mismatch  model                    how to create Mismatch model

Process statistical  model         how to create statistical model

Useful  GPS information    SNAP  at  The University of New South Wales Sydney, Australia

Advanced digital design and synthesis flow.
Targeted digital design block Major design concerns
Generic CPU design procedure/flow CPU architecture,  CPU operation speed, power, machine instruction set, digital interface,  
Generic RTL to layout (GDS) procedure/flow timing closue, chip size, cross talk, frequency, power, EDA/CAD tool integration,
Generic pure digital PLL design procedure/flow operation speed, power, jitter, stability, 
Generic DSP design procedure/flow DSP architecture, I/O speed, math function, command set, power,digital interface,  

Pro and Con of several mixed signal (digital and analog) design flow and methodology. (Member only)

Basic Analog Building blocks
The status of each IP block are categorized into four stages depending on their maturity and condition.
These four status are ore, ferrite, steel, and tungsten.
state ore: at design block buildup stage

Design Block Design specification, 
Parms, & Documents, 
Design examples Typical Design Spec in XML Verilog-AMS or Verilog-A sample code Design Database
Operational Amplifier Design   ore ferrite OPA  ore  ore
Amplifier low noise and Power AMP ore  ore AMP ore ore
A/D and D/A converter  ore ore A2D_D2A ore ore
Voltage or Current References ore ore VREF ore ore
Charge pump  ore ore CHPUMP ore ore
Phase Lock Loop (PLL) ore ore PLL ore ore
Oscillator ore ore OSC ore ore
Motor_Control ore ore Motor_Control ore ore
DC_to_DC Converter ore ore DC_to_DC ore ore
Coder and Decoder ore ore CODEC ore ore
Mixer ore ore MIXER ore ore
Transceiver ore ore TXRECIER ore ore
Filters ore ore FILTER ore ore
Memory ore ore MEMORY ore ore
Power_on_reset ore ore POR ore ore
Viterbi decoder ore ore VITERBI ore ore
Reed Solomon codes ore ore RS_DECODER ore ore


Useful Circuit Design Websites
CircuitSage All kinds of circuit and MATLab file for real circuit design.
OPENCORES Open source IP repository
PLL design in CircuitSage website PLL design in CircuitSage
Demo on Demand Online demo from service providers
EEtimes Online EEtimes website

EDA articles & other technical resources

Design-reuse Design resue website.

Focus on advanced IC design market

SoC Central SOCcentral brings you the latest new about SOC/ASIC/FPGA design, EDA tools, design methodologies, intellectual property (IP), and design reuse.
Analog PDK 101 Analog PDK 101 and IC design quality on Chip design magazine. Very good overall prespective on analog/Mixed signal PDK and design. All analog and Mixed signal designers should read and understand this paper.
freebookcenter.net This FreebookCenter.net has a lot of  free e-books and guides on Basic Electronics, computer program and medical  books which can be viewed online or downloadable in pdf, chm, rar or zip.
www.gsaglobal.or Global Semiconductor Alliance (GSA),  Defining standards for PDK components. 
GSA's mission is to accelerate the growth and increase the return on invested capital of the global semiconductor industry by fostering a more effective fabless ecosystem through collaboration, integration and innovation.
Agilent Online Demo Online Agilent EDA demo
Design/IP Reuse Online Design reuse and IP service provider
Xilinx design reuse document Xilinx design resue Document.
TechOnLine many useful eduational tools for EE and IT
Phase Lock Loop tutorial Phase Lock Loop tutorial
DeepChip EDA group Online EDA discussion group. Lot of useful info.
International cadence Usergroup
Cadence Tools Docs Online Cadence tool pdf files.
Synopsys Nanosim doc Online Synopsys Nanosim pdf files.
Silicon Integration Initiative
A organization focuses on improving productivity and reducing cost in creating and producing integrated silicon systems.
Openeda at SI2.org
OpenEDA.Si2.org is a restricted access site for the distribution of licensed materials from Si2 development groups (councils, projects, boards, or workgroups).
OpenAccess OpenAccess is a community effort to provide true interoperability, not just data exchange, among IC design tools through an open standard data API and reference database supporting that API for IC design.
eg3 Online discssion group
EDAboard Online Analog IC design and layout discussion forum.

Online magazine


Website with a lot of real circuit design and related information.

Verilog-AMS Sample Library Sample Verilog-AMS sample Library. OPA, ADC, and MOS etc sample code.
Verilog-AMS Language Manual Verilog-AMS language manual.


web site analysis
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