Phase Lock Loop Design Specification, design procedure and examples PLL 101

                                                                                       Original created July 8 2011
                                                                                        Last Update Nov. 11 2012
                                                                                                         by Martin Chu
Fundamental and essential design knowledge 
Phase Lock Loop Design fundamentals from Motorola (AN. 535)

Phase Look Loop Design specification in pure text format
Parameter some typical value and unit Quote design or product Last reviewed and update for this parameter
Operation Voltage
Lock-in frequency range
Output  Center Frequency
Tracking frequency range
Close Loop gain 
Overshoot
Loop Bandwidth
Output Amplitude
Transient Response
Nominal power dissipation
Input voltage range 

Guideline:
PLL Design Guidelines

PLL Archeticture selections:
PLL Archeticture selection for different system design and application.

Various PLL  Designs  
Generic PLL Design
PLL Design I    High Frequency
PLL Design II   High tracking speed.
PLL Design III Low phase or jitter Noise
PLL Design IV high stablility  Member only for now

How to test and characterize PLL performance.

Basic Design requirements:
Design a general purpose PLL   Under construction!

Design, MATLAB, and  SPICE simulation Techniques



Useful PLL designing tools, code, or program
Code targeting for Programming language used Author or original source for that code or program Comment
Overall PLL design MATLAB
Overall PLL performance in high level code simulation Python from Paul  Lutus Excellent and clear description about PLL
SimPLL Tutorial
Applied Labs

Useful design information and resources regarding PLL over Internet
Topic Author or original source for that code or program Comment
PLL Design info inside CircuitSage CircuitSage as a whole
Communication Circuit Lab in UCLA Professor Behzad Razavi Excellent site for communication Circuit and what CCL is doing inside UCLA.
Resources for Precision Timing, Stability, and Noise Analysis
PLL related information, project and web resource compiled by John Miles excellent and has very good projects inside


Useful PLL designing tools, code, or program
Code targeting for Programming language used Author or original source for that code or program Comment
Overall PLL design MATLAB
Overall PLL performance in high level code simulation Python from Paul  Lutus Excellent and clear description about PLL



On-line PLL selection guide and websites


Currently available products on market, their performance, design spepecification and data sheet.

PLL design market leaders

Leading designs or IC products
 
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