a PDK and EDA/CAD flow should have for a fabless design house
Created on May. 1 2010
Last Update Feb 5 2011
All PDK elements should be aligned
with foundry's SPICE model, CDK
official documents, process steps, mask making operation, and
document version control. If
possible, also use/adopt the same and industrial
(either from Cadence or foundry
provided) for consistent verification and accurate simulation results.
statement is special true for small to medium design house, because
they do not have plentiful human resources to engage in all aspect of
All PDK elements should support
standard industrial CAD
and suggested design flow (i.e, TSMC reference Design flow 11) as much
as possible. Try to avoid any customized PDK
elements especially for small companies. If customerization in PDK is
inevitable, make sure a long term PDK/EDA strategy is established and
Design/PDK/ and layout
database should be standardized and version controlled.
Design flow and EDA system should take care of CAD tool and PDK version.
* There should be a design reuse practice and design
specification, testbench and simulation automation flow.
* There should be a design flow and
methodology that is compatible with
IP creation flow. In short, the design process should leads
creation and can be easily reuse and verify with minimal extra effort
for any parties if desired.
* VXL needs to
support correct connectivity in all supported devices
* Each and every important infrastructure project within company
phased into three development stages. This is to
proper address of
urgent issues and
drive toward a consistent PDK/EDA methodology.
Design Knowledge and Best Practice should be captured in a Wikipage or
* IP creation should
as the same as Patent application. An excellent IP is as useful and
valuable for company as Patent. However, there should a sincere and
fair IP create and reward system in place to encourage and facilitate
this IP creation process.
All Design/PDK/CAD Training
tutorial and general information
should be readily available and in side company intra
* System Design knowledge
should be also captured in the
design flow and become a part of overall company core competence IP
There should be a generic,
robust and constant logic and Mixed Signal/analog
design flow. Too many different verification flows, special treatment
by projects, isolation schemes and handling of components lead to
mistakes and inefficiency.
and PDK should be access tracked
and version controlled as soon as possible, if time and resource
permitted. This can help in IP reuse, knowledge sharing, and
* Support used
system as needed and requested ( i.e., Cadence
442, CDS446, CDS5.1 CDS 6.1 and OpenAccess) Support
non-used and obsolete old system is wasting precious resource
specification (i.e., in XML), Design parameters setup, TB and
configuration for design
There should be a automatic
QA flow to verify the accuracy of
SPICE model and circuit simulation flow.
* Common and intuitive GUI. Use Design Automation
and methodology for project setup and design quality control
setup (less important)
how to drive the EDA/PDK flow of
a company to reach the design flow status we just mentioned in
solve all urgent fire fighting issues need issues first.
Review and align device model to real silicon.and ensure the accuracy
original silicon data.make sure the SPICE or BSIM model are up to date
Review and ensure all technology/process related parameters in EDA tool
are accurate and up to date.
Review and ensure that all DRC rules are implemented and correctly
Review and ensure that all supported devices have correct layer
combination, pin and
(6) Review and verify digital library and its models are correct and up
to date with SPICE/BSIM model;
parasitic R and C extracted values are accurate and verified.
(8) Establish consistent PDK, IP and Design
database and directory structure.
(9) Start building up QA cells and library for
used technologies. All
basic and essential QA cells build up
(10) Ensure and upgrade so that All
needed and supported EDA tools and flow working correctly.
Final tape out mask Boolean operation verification and DRC,
violation sign-off process and flow.
Begin to work and establish a clear, well-known, and cooperative
development and work flow.
(6 month to 3 year)
Establish issue and ticket tracking system if not yet available inside
Review, create and publish tool and PDK compatibility table.
(3) Align and sync DRC checks, PDK Document
layout version control
and tagging practice. This task should be a real and sincere
company-wide effort in oder to make it successful.
Finalize all the basic and necessary DRC, ERC and LVS QA cell
elements, and new QA cell addition
flow, and PDK release flow.
Bring all out of supported CAD tools (currently still used)
date and review all
reported bug and issues.
Start building up QA cells and library for each and every technology.
Start working on Design compatible and IP reuse methodology/flow.
Understand all requirements, deliverables from each and every parties,
Design /IP specification and verifications, creation and version
|(1) The QA library and
automatic verification flow for commonly used
technolog should be in place.
PDK development area, pre-release QA, and final PDK release procedure
flow should be finalized.
QA current status and supported CAD and flow version should be
available on internal Web.
creation (compatible with design flow) and status should be finalized
and gradually move into main stream design flow.
(5) All successful design and projects should be well documented
and published in internal web and access-controlled.
All materials and web site arrangement are copyrighted ©
Please respect individual's effort.