What a PDK and EDA/CAD flow should have for a fabless design house
by Martin Chu,
Created on May. 1 2010
Last Update Feb 5 2011

* All PDK elements should be aligned with foundry's SPICE model, CDK elements, official documents, process steps, mask making operation, and document version control. If possible, also use/adopt  the same and industrial  standard netlister (either from Cadence or foundry provided) for consistent verification and accurate simulation results. This statement is special true for small to medium design house, because they do not have plentiful human resources to engage in all aspect of EDA/CAD activities.
* All PDK elements should support standard industrial CAD tools and suggested design flow (i.e, TSMC reference Design flow 11) as much as possible.  Try to avoid any customized PDK elements especially for small companies. If customerization in PDK is inevitable, make sure a long term PDK/EDA strategy is established and being  followed.

* Design/PDK/ and layout database should be standardized and version controlled.

* Design flow and EDA system should take care of CAD tool and PDK version.

* There should be a design reuse practice and design specification, testbench and simulation automation flow.

* There should be a design flow and methodology that is compatible with IP creation flow.  In short, the design process should leads to a IP creation and can be easily reuse and verify with minimal extra effort for any parties if desired.

VXL needs to support  correct connectivity in all supported devices

* Each and every important infrastructure project within company should be phased into three development stages. This is to ensure proper address of urgent issues and drive toward a consistent PDK/EDA methodology. 

* Design Knowledge and Best Practice should be captured in a Wikipage or Track webpage.

* IP creation should be treated as the same as Patent application. An excellent IP is as useful and valuable for company as Patent. However, there should a sincere and fair IP create and reward system in place to encourage and facilitate this IP creation process.
* All Design/PDK/CAD Training tutorial and general information should be readily available and in side company intra websites     

System Design knowledge should be also captured in the design flow and become a part of overall company core competence IP database.  

* There should be a generic, robust and constant logic and  Mixed Signal/analog design flow. Too many different verification flows, special treatment by projects, isolation schemes and handling of components lead to mistakes and inefficiency. 

All Design, layout and PDK should be access tracked and version controlled as soon as possible, if time and resource permitted. This can help in IP reuse,  knowledge sharing, and new product development.

* Support used Cadence system as needed and requested  ( i.e., Cadence 442,  CDS446, CDS5.1 CDS 6.1 and OpenAccess) Support too many non-used and obsolete old system is wasting precious  resource and reduce efficiency.

* Standardize design specification (i.e., in XML), Design parameters setup, TB and environment configuration for design verification.

* There should be a automatic QA flow to verify the accuracy of SPICE model and circuit simulation flow.

* Common and intuitive GUI. Use Design Automation and methodology  for project setup and design quality control

* Artisan project setup (less important)

Then how to drive the EDA/PDK flow of a company to reach the design flow status we just mentioned in above?

Short (6month)
(1) solve all urgent  fire fighting issues need issues first.
(2) Review and align device model to real silicon.and ensure the accuracy of the original silicon data.make sure the SPICE or BSIM model are up to date to the foundry technologies.
(3) Review and ensure all technology/process related parameters in EDA tool and flow are accurate and up to date.
(4) Review and ensure that all DRC rules are implemented and correctly checked.
(5) Review and ensure that all supported devices have correct layer combination, pin and connectivity.
(6) Review and verify digital library and its models are correct and up to date with SPICE/BSIM model;
(7) the parasitic R and C extracted values are accurate and verified.        
(8) Establish consistent PDK, IP and Design database and directory structure.
(9) Start building up QA cells and library for most frequently used  technologies. All basic and essential QA cells build up
(10) Ensure and upgrade so that All needed and supported EDA tools and flow working correctly.
(11) Final tape out mask Boolean operation verification and DRC, ERC  violation  sign-off process and flow.
(12) Begin to work and establish a clear, well-known, and cooperative EDA/PDK/IP development and work flow.

Medium (6 month to 3 year)
(1) Establish issue and ticket tracking system if not yet available inside company.
(2) Review, create and publish  tool and PDK compatibility table.
(3) Align and sync DRC checks, PDK Document and layout version control and tagging practice. This task should be a real and sincere company-wide effort in oder to make it successful.
(4) Finalize all the basic and necessary  DRC, ERC and LVS QA cell elements, and  new QA cell addition flow, and PDK release flow.
(5) Bring all out of supported CAD tools (currently still used)  up to date and review all reported bug and issues. 
(6) Start building up QA cells and library for each and every technology.
(7) Start working on Design compatible and IP reuse methodology/flow. Understand all requirements, deliverables from each and every parties, Design /IP specification and verifications, creation and version control flow.

Long:  (3-5 year)
(1) The QA library and automatic verification flow for commonly used technolog should be in place.   
(2) The PDK development area, pre-release QA, and final PDK release procedure flow should be finalized.
(3) PDK QA current status and supported CAD and flow version should be available on internal Web.
(4) IP creation (compatible with design flow) and status should be finalized and gradually move into main stream design flow.  
(5) All successful design and projects should be well documented and published in internal web and access-controlled.

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